請問sb-RIO 9631有辦法跑FFT嗎?又該怎麼接線才對呢?

大家好:

我是剛學labview fpga的新手,但因為論文一定要用到,所以想請教各位。

請問sb-RIO 9631有辦法跑FFT嗎?又該怎麼接線才對呢?

我現在要寫的程式是在AI26接腳直接讀值進來,一週要取16點,60Hz,所以我設41667ticks抓一次值,然後就要丟進FFT看頻譜了,因為我不懂FPGA底下的FFT,所以我想說先接簡單的,看這樣會出來什麼訊號,但就不能跑,可以幫我看看是什麼的問題嗎?

Compilation failed due to a Xilinx error.

Details:
ERROR:TclTasksC:process_077: Failed to complete. Please inspect the log and report files.false
    while executing
"process run "Map""
    (file "C:\NIFPGA\jobs\TjnXG20_XI64xG6\map.tcl" line 8)


ERROR:Place:665 - The design has 10 block-RAM components of which 10 block-RAM
   components require the adjacent multiplier site  to remain empty. This is
   because certain input pins of adjacent block-RAM and multiplier sites share
   routing ressources. In addition, the design has 17 multiplier components.
   Therefore, the design would require a total of 27 multiplier sites on the
   device. The current device has only 24 multiplier sites.
Phase 1.1  Initial Placement Analysis (Checksum:2d7469b2) REAL time: 39 secs
ERROR:Pack:1654 - The timing-driven placement phase encountered an error.
Mapping completed.
See MAP report file "toplevel_gen_map.mrp" for details.
Problem encountered during the packing phase.
Design Summary
--------------
Number of errors   :   2
Number of warnings : 226
Process "Map" failed

意思應該是硬體資源不夠你揮霍了, 所以compile不過了, 由於error message 哭的是block ram爆表了, 起因於程式裡用了17個乘法器 (multiplier), 導致硬體需求27個  multiplier site, 但是你的sb-RIO 9631上面的FPGA只有24個multiplier site, 所以玩不了FPGA FFT.

 

FFT遞迴式的演算法常會利用FPGA裡將兩兩相鄰的乘法器與block RAM串起來實現, 所以compile不了也不一定是你的錯, 調一調FFT vi裡係數試試, 或是直接將AI抓到的陣列丟出來給板上Real Time CPU算FFT (畢竟60Hz不大快的說).